BCHAssembleMIPSInstructionAssembles a MIPS assembly instruction into a doubleword.
val assemble_mips_move_instruction :
?bigendian:bool ->
BCHLibTypes.mips_reg_t ->
BCHLibTypes.mips_reg_t ->
stringassemble_mips_move_instruction ~big_endian dst src returns a string that represents the bytes of the assembly instruction move dst, src in the requested (big or little endian) order.
val assemble_mips_sw_stack_instruction :
?bigendian:bool ->
BCHLibTypes.mips_reg_t ->
int ->
stringassemble_mips_sw_stack_instruction ~big_endian src offset returns a string that represents the bytes of the assemble instruction sw src, offset($sp) in the requested (big or little endian) order.
val assemble_mips_instruction :
?iaddr:BCHLibTypes.doubleword_int ->
BCHMIPSTypes.mips_opcode_t ->
BCHLibTypes.doubleword_intassemble_mips_instruction ~iaddr opc assembles opc into a doubleword according (in bigendian representation), where iaddr is the virtual address of the instruction (relevant only if the instruction is pc-relative.