BCHMIPSDisassemblyUtils (codehawk.BCHMIPSDisassemblyUtils)

val select_mips_reg : int -> BCHLibTypes.mips_reg_t

select_mips_reg i returns the MIPS register with sequence number i (e.g., $a0 for 4, $s0 for 16, etc.)

raise BCH_failure if i is outside the range 0 - 31

val decompose_instr : 
  BCHLibTypes.doubleword_int ->
  BCHMIPSTypes.mips_instr_format_t

decompose_instr dw returns the decomposition of dw into one of the instruction types, e.g., J-type, R-type, etc, with the fields broken down accordingly.

val instr_format_to_string : BCHMIPSTypes.mips_instr_format_t -> string

val code_to_mips_fp_format : int -> BCHMIPSTypes.mips_fp_format_t

val get_conditional_jump_expr : 
  BCHLibTypes.floc_int ->
  BCHMIPSTypes.mips_opcode_t ->
  XprTypes.xpr_t

val get_direct_jump_target_address : 
  BCHMIPSTypes.mips_opcode_t ->
  BCHLibTypes.doubleword_int

val is_conditional_jump_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val is_fp_conditional_jump_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val is_direct_jump_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val is_indirect_jump_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val is_jump_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val is_halt_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val is_return_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val is_direct_call_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val is_indirect_call_instruction : BCHMIPSTypes.mips_opcode_t -> bool

val get_direct_call_target_address : 
  BCHMIPSTypes.mips_opcode_t ->
  BCHLibTypes.doubleword_int

val get_indirect_jump_instruction_register : 
  BCHMIPSTypes.mips_opcode_t ->
  BCHLibTypes.mips_reg_t

val get_string_reference : 
  BCHLibTypes.floc_int ->
  XprTypes.xpr_t ->
  string option